Circuits

CMOS Nanoelectronics: Innovative Devices, Architectures, and by Nadine Collaert

By Nadine Collaert

This ebook covers probably the most very important gadget architectures which were greatly researched to increase the transistor scaling: FinFET. beginning with idea, the booklet discusses the benefits and the combination demanding situations of this gadget structure. It addresses intimately the subjects resembling high-density fin patterning, gate stack layout, and source/drain engineering, which were thought of demanding situations for the combination of FinFETs. The ebook additionally addresses circuit-related features, together with the impression of variability on SRAM layout, ESD layout, and high-T operation. It discusses a brand new gadget thought: the junctionless nanowire FET.

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W, Rustagi S. , Bera L. , Tung C. , Hoe K. , Omampuliyur S. , Adeyeye A. , Lo G. Q. Balasubramanian N. and Kwong D. , “Ultra-narrow silicon nanowire gate-all-around CMOS devices: Impact of diameter, channel-orientation and low temperature on device performance,” IEDM Tech. Digest, 1–4, 2006. 54. , Teherani J. T. and Hoyt, J. , “Investigation of hole mobility in gate-all-around Si nanowire p-MOSFETs with high κ/metal-gate: Effects of hydrogen thermal annealing and nanowire shape,” IEDM Tech. Digest, 788–791, 2010.

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